1. [LLVMdev] Understanding SelectionDAG construction
  2. [LLVMdev] Data layout and Optimization
  3. [LLVMdev] CodeGen instructions and patterns
  4. [LLVMdev] Pattern matching in a SelectionDAG
  5. [LLVMdev] Conceptual difference between "Unallocatable" and "Reserved" registers.
  6. [LLVMdev] The meaning of SDNPHasChain
  7. [LLVMdev] Question about 'side-effect' and 'chain'
  8. [LLVMdev] Difference between pattern and dag2dag isels
  9. [LLVMdev] Question about porting LLVM - code selection without assembler feature
  10. [LLVMdev] Where can I find an explanation of $src1, $src2, $in, $ptr, etc.?
  11. [LLVMdev] Adding a custom calling convention
  12. [LLVMdev] LLVM new backend compiling/linking problem
  13. [LLVMdev] Meaning of MIOperandInfo

  • Libraries.

    1. STLPort: A port of the original STL to many platforms. Derived from the SGI implementation.
    2. Microsoft Predefined Macros

  • Memo

    1. llvm/lib/Target/ISDOpcodes.h. The target-independent operators for a SelectionDAG are defined here.
    2. llvm/include/llvm/CodeGen/SelectionDAGNodes.h. SDNode class and derived classes are defined here.
    3. TokenFactor Node

  • This node takes multiple tokens as input and produces a single token result. This is used to represent the fact that the operand operators are independent of each other.

  • llvm/utils/TableGen/CodeGenInstruction.h/cpp. Instruction generated by tablegen.
  • Questions:

    1. What's the functionality of TokenFactor Node (except grouping Loads and Exports)? How does it interact with instruction scheduling, register allocating and alias analysis?